2011 Workshop on Architectures II: Exascale and Beyond: Configuring, Reasoning, Scaling

Organizers:	Lenore Mullin, William Harrod, Sonia Sachs (ASCR DOE) Richard Lethin (Reservoir Computing), Arun Rodrigues (SNL), Marc Snir (UIUC), Thomas Sterling (Indiana University), John Shalf (LBNL)
Dates:	Monday 8/8/11 12:00 PM through Wednesday 8/10/11 6:00 PM
Location:	Sandia National Laboratories, Albuquerque, NM

The goal for this workshop will identify ways that we can abstract architectures, in general, to meet the ever-changing complexities inherent in exascale (and beyond). This workshop will be essential in molding our path forward in hardware and software architectures design space exploration, including simulation and emulation modeling and their role in developing and implementing abstract machine models. Moreover, we believe that such methodologies will prove insightful in discovering what could and should be included or changed in next and future generation hardware. Scholars from both DOE and non-DOE communities will participate. Together we will identify machine abstractions, their idealized primitives, and view of memory. It will be informative to discuss and debate the realization of these abstractions. Moreover, given an existing real system and/or subsystem, how do we do explain its machine abstraction and would this abstraction be sufficient to explain the performance attributes of exascale?

This workshop will address the following questions:

How do we connect real machines, existing and future, to their simulation and emulation with confidence?
- What are the gaps in the way we think about the hardware – software boundary?
- Where does it begin?
- Is it the machine instruction set?
- Is this where the co-design really begins?
- What are the functional building blocks needed to create an idealized programming language for DoE applications idealized to port and scale to exascale (or beyond)?
- Is then the OS, written in the machine instruction set, capable of scaling with the increased resources of exascale?
- If we knew in the 60s what we know about networks, caches, shared memory, distributed memory, disk memory, or any memory, would we design OSs and subsequently memory and memory management differently? The similar question is posed for processing units: CPUs, GPUs, FPGAs, ASICs, … .
Can and should hardware design languages have a semantic equivalence with programming design languages?
- Can they be co-designed for DoE applications?
- What are the core algorithms, built upon a closed algebra idealized as an FSA, then discussed as an FSM?
- Could this be the start of a new way to think of the hardware software boundary?
- Would it then be easier to study data locality posed by the memory access patterns of DoE core algorithms and subsequently core applications throughout all levels of memory?
If we had an Abstract Machine could we define and build a real exascale system and/or subsystem?
If we have a real exascale system and/or subsystem could we define their abstractions?
- Can we take any real machine, and describe its abstraction and show, and ideally prove it maps and/or scales to another and visa versa, can we abstract a machine that was realized?
What is the consensus on the definition of Abstract Machines, Execution Models and Programming Models? How do these models relate to each other? How are they similar? How are they different? Do we need all three?
How do we formally specify and analyze Abstract Machine Models for HPC systems?
What are the execution, communication, synchronization, placement, partitioning, and scheduling primitives to be considered? How do we formally compose these primitives and prove the correctness of the composition?
The Abstract Machine model must include the specification of the system software. How is it specified?
Provide examples of Abstract Machine Models for HPC systems or subsystems?
What are the characteristics of an HPC Abstract Machine model that enables the task of developing new (or extending existing) programming models that provides the developer with "ease of programming" to fully achieve their Exascale goals (performance, power, space, locality, etc.)
How are the performance and execution characteristics evaluated for an Abstract Machine Model?
Where does the federal government need to invest to overcome the technical challenges that are NOT funded by the computer industry?
Assuming that an Exascale computer needs to be delivered and operational in 2020, when do these investments need to be initiated? Is this goal achievable?

A report that summarizes the workshop discussion and provides recommendations for exascale research will be generated by the workshop committee (TBD). The report will be completed within two weeks of the workshop date and outlined by the committee on the last day of the workshop.

The workshop will be held over 2.5 days: Agenda is subject to change.

The meeting will be held at Sandia National Laboratory's CSRI Building, 1450 Innovation Parkway (corner of Innovation Parkway and Research Road), Albuquerque, NM 87178. The workshop is being held Monday, August 8 through Wednesday, August 10, 2011 in CSRI/90.

On Monday, August 8th, the meeting will begin at noon and end at 6:00 p.m. The meeting will begin at 8:00 a.m. and end at 6:00 p.m. the remaining two days. A continental breakfast and working lunch will be provided each day.

A working dinner will be held on the evening of Tuesday, August 9th at El Pinto Restaurant from 7:00 p.m. until 9:30 p.m. Transportation to and from the restaurant will be provided. Please meet at the entrance to the CSRI building promptly at 6:00 p.m. for an on time departure to the restaurant. Please notify ORISE immediately if you have any special dietary requirements.